Flash memories are rewritable non-volatile memories (MNV), whose stored data do not disappear when the power is switched off. The high speed, the lifetime and the low consumption of this type of memory render it attractive for numerous uses for example in digital stills cameras, cellular telephones, printers, personal assistants (PDA), laptop computers or sound readout and recording devices such as digital personal stereos, USB keys.
Electronic disks known by the name (SSD) disks, standing for “Solid-State Drive” in English, intended to replace traditional hard disks known by the name (HDD) disk, standing for “Hard-Disk Drive” in English, are static storage units. Some SSDs use flash memories of (MLC) type, standing for “Multi Level Cell” in English, to store 2 bits per memory cell or of (TLC) type, standing for “Triple Level Cell” in English, to store 3 bits per memory cell in place of 1 bit per memory cell as in the flash memories of (SLC) type, standing for “Single Level Cell” in English. The increase in the number of bits per cell is one of the means for reducing the difference in price per gigabyte (GB) between SSDs and hard disks HDDs, to exploit the advantages of SSDs with respect to HDDs in terms of performance, consumption and resistance to knocks.
However, a point of weakness of flash memories is that the retention time of the data stored in the memory cells, the time corresponding to the longest period of data preservation, is impacted by the temperature prevailing in the memory. This phenomenon is augmented in the case where more than one bit is stored per cell. Certain MLC memories may have a guaranteed end-of-life retention time of two months at 40° C. This time, by applying the Arrhenius law, which predicts an exponential increase in retention time with temperature, is equivalent to a retention time of two days at 70° C. However, an SSD with a sizable workload can reasonably reach such a temperature, even in a controlled temperature environment such as a datacenter.
To curb the effects of the reduction in retention time, it is known to undertake periodic refreshing of the data. This refreshing can be executed without changing the place where the data are stored, by injecting just the quantity of charge which is lacking on the floating gate of the memory cells and one then speaks of in situ refreshing, or alternatively the refreshing can be undertaken by rewriting the data to a different address by reprogramming. In situ refreshing is manifested by a lesser impact on energy consumption and on response speed, and it has, virtually, no impact on the endurance to the P/E cycles.
The endurance of a flash memory which is generally measured as number of guaranteed Programming/Erasure (P/E) cycles, is reduced by a decade on average for each additional bit stored in the memory cells. This impact may be mitigated by relaxing the upper limit of the number of guaranteed P/E cycles, but this is achieved to the detriment of the guaranteed retention time.
Because of this mutual interdependency between the endurance and the retention time of flash memories, the solutions involving periodic refreshing of the data can also be used to improve the endurance of memories. This can be implemented by increasing the maximum number of P/E cycles allowed on a flash memory while mitigating the impact of this increase by periodic refreshing.
The drawback remains that in the presence of temperature variations which may be due to a change of environmental conditions and/or due to the workload of the memory, fixed-frequency refreshing may entail sizable penalties in terms of latency of response, of energy consumption and of available number of P/E cycles.
Hence, the need exists for a solution which alleviates the drawbacks of the known approaches. The present invention attends to this need.